Title Details

BETTY PRINCE, PHD has over thirty years of experience in the semiconductor industry, having worked with Texas Instruments, N.V. Philips, Motorola, R.C.A., and Fairchild. She is currently CEO of Memory Strategies International, Leander, Texas, USA. She holds patents in the memory, processor and interface designs.

DAVID PRINCE has worked with the memory reports written by Memory Strategies International for the last eighteen years. He holds degrees in Computer Science, Physics, and Astronomy from the University of Texas.

Introduction to the Intelligent Internet of Things xi

1 Smart Cities as the Prototype of the Intelligent Internet of Things 1

1.1 Overview 1

1.2 Smart Cities 1

1.3 Smart Commerce as an Element of the Smart City 1

1.3.1 Smart Inventory Control 1

1.3.2 Smart Delivery 3

1.3.3 Smart Marketing Using Artificial Intelligence 3

1.4 Smart Residences 4

1.4.1 A City of Smart Connected Homes 4

1.5 People as Center of Smart Connected Homes 5

1.5.1 Wearable Electronics 5

1.5.2 Control Electronics 6

1.6 Smart Individual Transportation 6

1.6.1 Overview of Smart Automobiles 6

1.6.2 Driving Aids 7

1.6.3 Engine Processors 8

1.6.4 Auto Body Processors 8

1.6.5 Infotainment Processors 8

1.6.6 Autonomous Cars 8

1.7 Smart Transportation Networks 9

1.7.1 Smart Public Conveyance Networks 9

1.7.2 Individual Automotive Traffic Control 9

1.7.3 Smart Highways 10

1.8 Smart Energy Networks 10

1.8.1 Smart Electrical Meters 10

1.8.2 Smart Electrical Grids 12

1.9 Smart Connected Buildings 12

1.9.1 Smart Office Buildings 12

1.9.2 Smart Factories 13

1.9.3 Intelligent Hospitals 13

1.9.4 Smart Public Buildings 14

1.10 Thoughts 15

References 15

2 Memory Applications for the Intelligent Internet of Things 17

2.1 Introduction 17

2.2 Comparisons of the Various Nonvolatile Embedded Memories Characteristics 18

2.2.1 Embedded EEPROM, Flash, and Fuse Devices 18

2.2.2 Embedded Emerging Memory Devices in MCU 19

2.2.3 Required Properties of Embedded Nonvolatile Memories in Various Applications 21

2.3 Circuits Using Ultralow Power MCU with Embedded Memory for Energy Harvesting 23

2.3.1 Introduction to Ultralow Power MCU Using Energy Harvesting 23

2.3.2 Ultralow Power MCU with Embedded Flash Memory for Energy Harvesting 24

2.3.3 Ultralow Power MCU with Embedded FeRAM Memory for Energy Harvesting 24

2.3.4 Ultralow Power MCU with Embedded RRAM Memory for Energy Harvesting 26

2.3.5 Ultralow Power MCU for Energy Harvesting Power Management 26

2.4 Ultralow Power Battery Operated Flash MCU 27

2.4.1 Introduction to Ultralow Power Battery Operated Flash MCU 27

2.4.2 Ultralow Power Battery Operated Flash MCU with Embedded Flash Memory 28

2.4.3 Ultralow Power Battery Operated MCU with Embedded RRAM 29

2.4.4 Ultralow Power Battery Operated MCU with Embedded FeRAM 30

2.5 Nonvolatile MCUs Using Emerging Memory for Nonvolatile Logic 32

2.5.1 Nonvolatile Logic Arrays Using FeRAM 32

2.5.2 Nonvolatile Logic Arrays Using MTJ MRAM 35

2.5.3 Processors with RRAM for Nonvolatile Logic Arrays 37

2.6 Communication Protocols for Memory Sensor Tags 41

2.6.1 Radio Frequency Identification (RFID) Tags 41

2.6.2 Near Field Communications (NFC) 42

2.6.3 Bluetooth]Based Beacons and Sensor Nodes 43

2.6.4 IoT Devices with Wi]Fi 46

2.6.5 IoT Devices with USB Connectivity 47

2.6.6 Single Wire Connectivity 48

2.6.7 Zigbee Interface 48

2.6.8 ANT Interface 48

2.7 Wearable Medical Devices 49

2.7.1 Overview of Wearable Medical Devices 49

2.7.2 Miniature Hearing Aids Using FeRAM Memory 50

2.7.3 Body Sensor Node Platforms Using CB]RAM Memory 50

2.7.4 “Store Mostly” Healthcare Systems Using MRAM 50

2.7.5 Wearable Biomonitoring with NFC and eFeRAM Memory 51

2.7.6 Wearable Healthcare System with ECG Processor Using FeRAM 52

2.8 Low Power Battery Operated Medical Devices and Systems 55

2.8.1 Overview of Low Power Battery Operated Medical Devices 55

2.8.2 Low Power Battery Operated Medical Devices Using eFlash 55

2.8.3 LP Battery Operated Medical Devices Using Embedded Emerging Memories 59

2.8.4 Security for Medical Systems 60

2.9 Automotive Network Applications 61

2.9.1 Overview of the Automotive Application 61

2.9.2 Early Advanced Automotive Driver Assistance Systems 64

2.9.3 More Recent Advanced Driver Assistance Systems (ADAS) 65

2.9.4 Automotive Navigation and Positioning 66

2.9.5 Under]the]Hood Applications 66

2.9.6 MONOS Memory for Under]the]Hood Applications 68

2.9.7 Automotive Infotainment 69

2.9.8 Secure Automotive 70

2.9.9 Automotive Body Processors 70

2.10 Smart Electrical Grid and Digital Utility Smart Meters 71

2.10.1 Overview of the Smart Meter Market 71

2.10.2 Smart Meter Chips with Embedded Flash Memory 71

2.10.3 Smart Meter Chips with Large Embedded Flash Memory 71

2.11 Consumer Home Systems and Networks 74

2.11.1 Remote Controls 74

2.11.2 Environmental Sensors 75

2.11.3 Home Network Systems 75

2.12 Motor Control Chips with Embedded Memory 76

2.12.1 Small System Motor Control Using Embedded Memory 76

2.12.2 Motor Control for Multiple Motors Using Embedded MONOS Memory 76

2.12.3 Motor Control with Embedded NV FeRAM 77

2.13 Smart Chip Cards in Advanced Applications 77

2.14 Analysis of Big Data Server Memory Hierarchy for Storing IoT 78

References 80

3 Embedded Flash and EEPROM for Smart IoT 89

3.1 Introduction to eFlash and eEEPROM for Smart IoT 89

3.1.1 Overview of eFlash and eEEPROM for Smart IoT 89

3.1.2 Summary of Application Requirements for Embedded Flash in IoT 90

3.2 Single Poly Floating Gate eFlash/EEPROM Cells for IoT 91

3.2.1 Overview of Single Poly Floating Gate eFlash/EEPROM for IoT 91

3.2.2 Early Single Polysilicon Floating Gate EEPROMS 91

3.2.3 Single Poly EEPROM Cells for Specialty Applications 96

3.2.4 Multitime]Programmable Single Poly Embedded Nonvolatile eMemories 99

3.2.5 Recent Single Poly Fully CMOS Embedded EEPROM Devices 103

3.2.6 Single Polysilicon eNVM in High Voltage CMOS 106

3.3 eFlash Cells Using Multiple Single Polysilicon CMOS Logic Transistors 107

3.4 Split Gate Technology for Floating Gate Embedded Flash 112

3.4.1 Early Split Gate Embedded Flash Floating Gate Technology 112

3.4.2 Issues, Peripherals, and Applications]Specific FG Split Gate Memory 116

3.4.3 Advanced Split Gate Floating Gate Technology below 50 nm 124

3.5 Stacked Flash and Processor TSV Integration 127

3.6 OTP/ MTP Embedded Flash Cells and Fuses 127

3.7 Stacked Gate Double Poly Flash 130

3.8 Charge Trapping eFlash 133

3.8.1 Overview of Early Embedded Charge Trapping Memory 133

3.8.2 Embedded 40 nm Charge Trapping (MONOS) Flash MCU 136

3.8.3 Embedded 28 nm Charge Trapping (MONOS) Flash MCU 139

3.8.4 Embedded Application]Specific 1T]MONOS Flash Macro 141

3.8.5 FinFET SG]MONOS 142

3.8.6 Embedded Charge Trapping (SONOS) NOR Flash 144

3.8.7 Embedded 2T SONOS NVM in HV CMOS 147

3.8.8 Self]Aligned Nitride Logic NVM 148

3.8.9 p]Channel SONOS Embedded Flash 149

3.8.10 Charge Trap eFlash for Low Energy Applications 150

3.8.11 Blocking and Tunnel Oxide of DT BE]SONOS Performance 151

3.8.12 Novel Embedded Charge Trap Memories 152

3.9 Split Gate CT eFlash Nanocrystal Storage 158

3.10 Novel Embedded Flash Memory 160

References 161

4 Thin Film Polymer and Flexible Memories 169

4.1 Overview 169

4.2 Organic Ferroelectric Memories 169

4.2.1 Characteristics and Features of Organic Ferroelectric Memories 169

4.2.2 Printable Ferroelectric Embedded Memories 174

4.2.3 IoT Applications of Thin Film Ferroelectric Memory 179

4.3 Polymer Ferroelectric Tunnel Junctions 181

4.4 Types and Characteristics of Polymer Resistive RAMs with Flexible Substrate 181

4.4.1 Overview of Polymer Resistive RAMs with Flexible Substrate 181

4.4.2 Parylene]C]Based Resistive RAM 182

4.4.3 Cu Atom Switches 184

4.4.4 Inorganic Thin Film Resistive RAMs on Flexible Substrates 187

4.4.5 IZO and IGZO Resistive RAM Memories 189

4.4.6 Other Polymer Resistive RAMS with Flexible Substrates 192

4.5 Charge Trapping Nanoparticle (NP) Memory on Flexible Substrates 199

4.5.1 Overview of Charge Trapping NP Memory on Flexible Substrates 199

4.5.2 Carbon Nanotube Charge Trapping Memory with Flexible Substrates 200

4.5.3 Inkjet Printed Nanoparticle Memory 201

4.5.4 Other Nanoparticle Charge Trapping Memories on Flexible Substrates 202

4.6 Transfer of Conventional Memory Chips on to Flexible Substrates 206

4.6.1 Transfer of Silicon Chips Using SOI Base Wafers 206

4.6.2 Creating Thin Chips Using an Underlying Cavity 208

4.6.3 Fan]Out Wafer Level Packaging for Assembling Silicon Chips on Flexible Substrate 210

References 215

5 Neuromorphic Computing Using Emerging NV Memory Devices 221

5.1 Overviewof Resistive RAMs and Ferroelectric RAMs in Neuromorphic Systems 221

5.2 Various Resistive RAMs for use as Synapses in Neuromorphic Systems 221

5.2.1 Metal Oxide Resistive RAM (MO]RRAMs) as Synapses 221

5.2.2 Conductive Bridge RRAM (CB]RRAM) as Synapses 224

5.2.3 Phase Change Memory (PCM) as Synapses 225

5.2.4 PCMO RRAM as Synapses 226

5.2.5 RRAM with Simultaneous Potentiation and Depression 228

5.2.6 Other Nonvolatile Memories with Analog Properties 229

5.3 3D Neuromorphic Memories 230

5.3.1 Neuromorphic Architectures as Dense TSV 3D Structures 230

5.3.2 3D Vertical RRAMs as Synapses Connecting Neurons 231

5.4 Modeling and Characterization of RRAMs as Synaptic Devices 236

5.5 Spiking Neural Nets, STDP, Potentiation, and Depression 239

5.5.1 Introduction to Spiking Neural Networks 239

5.5.2 Hybrid RRAM/CMOS STDP Neuromorphic Systems 239

5.5.3 Memory Synapse and Neuron Systems 244

5.5.4 Novel RRAM Synapse Applications 247

5.6 Neural Network Systems Using Ferroelectric RAM Technology 250

5.6.1 Neural Network Circuits Using Ferroelectric Memory (FeMEM) Synapses 250

5.6.2 Using the FeMEM in Neural Network Circuits 251

5.6.3 Ferroelectric Tunnel Junctions in Neuromorphic Circuits 252

5.7 Early Neuromorphic Computers Using Phase Change Memory 254

5.8 Resistive RAMs in Neuromorphic System Design and Application 257

5.8.1 Design for Synaptic Devices for Neuromorphic Computing 257

5.8.2 Using RRAMs in Various Neuromorphic Computing Applications 259

5.8.3 Large RRAM Array Design for Neuromorphic Computing 260

5.8.4 Advantages of RRAM over SRAM Crossbar Arrays in Matrix Multiplication 262

5.9 Neuromorphic Memories Using Polymer and Flexible Memories 262

References 266

6 Big Data Search Engines and Deep Computers 271

6.1 Overview of Big Data Search Engines and Deep Computers 271

6.2 Content Addressable Memories Made Using Various Emerging Nonvolatile Memories 271

6.2.1 Ternary CAMs Using Resistive RAMS 272

6.2.2 CAMs Made Using Magnetic Memory 273

6.2.3 CAMs Using Other Emerging Memories 276

6.3 Components of Large Search Engines and Artificial

Neural Networks 276

6.3.1 Using RRAMs in Look]Up Tables in Large Search Engines 276

6.3.2 Using STT MRAM in Large Artificial Neural Networks 278

6.4 Memory Issues in Deep Learning Systems 281

6.4.1 Issues with Partitioning SRAM and RRAM Synaptic Arrays 281

6.4.2 Issues of RRAM Variability for Extreme Learning Machine Architectures 283

6.4.3 Issues with RRAM Memories in Restricted Boltzman Machines 284

6.4.4 Large Neural Networks Using Memory Synapses 287

6.5 Deep Neural Nets for IoT 289

6.5.1 Types of Deep Neural Nets for IoT 289

6.5.2 Deep Neural Nets for Noisy Data 291

6.5.3 Deep Neural Nets for Speech and Vision Recognition 293

6.5.4 Deep Neural Nets for Other Applications 298

References 299

7 Memory in Security Issues for IoT 303

7.1 Introduction to Memory in Security Issues for IoT 303

7.2 Memories Used as Physical Unclonable Functions (PUFs) 303

7.2.1 Using RRAM for a Physical Unclonable Function 304

7.2.2 Using MRAMs as Physical Unclonable Functions 311

7.2.3 Using Flash Memory as a Physical Unclonable Function 315

7.2.4 Other Memories used as Physical Unclonable Functions 316

7.3 On]Chip Memory]Based Security Systems 316

7.3.1 Introduction to On]Chip Security Systems 316

7.3.2 Physically Secure Key and TAG Storage 316

7.3.3 Face and Feature Detection in Security Systems 319

7.3.4 Security in Embedded Systems 320

References 321

Index 323

Industrial maturity usually goes hand in hand with extreme specialization. The IoT driven renaissance in new memory technologies however calls out for a treatment that is both broad and deep. Luckily two of the few polymaths in the area have done it proud. Memories for the Intelligent Internet of Things by Betty and David Prince is the best so far. With almost five hundred references and an excellent first chapter that explains the Intelligent IoT using Smart Cities to set the scene, all of the incumbent and new solid-state memory technologies are covered: Flash, EEPROM, FeRAM, RRAM, MRAM, PCM, SONOS, MONOS, CB-RAM. Its all here. From device cross sections all the way to system implementation. I heartily recommend this book to anyone interested in this area, from academics and engineers working in the area to those curious about solid-state memories and what is driving their development. The shaking memory hierarchy has been explained. - Andrew Walker - CEO/Founder of Schiltron Corporation; VP of Spin Memory In their new book, Memories for the Intelligent Internet of Things, Betty Prince, with her co-author David Prince, once again deliver to her high standards of content: the book provides the essential details from a whopping 456 technical articles and refereed papers on every memory technology imaginable, from common flash memory to roll-printed organic polymersThis book will prove useful to anyone who needs to rapidly gain a broad understanding of the Intelligent IoT and all of the memory types that it can potentially use. - Jim Handy, OBJECTIVE ANALYSIS: Semiconductor Market Research, USA

Industrial maturity usually goes hand in hand with extreme specialization. The IoT driven renaissance in new memory technologies however calls out for a treatment that is both broad and deep. Luckily two of the few polymaths in the area have done it proud. Memories for the Intelligent Internet of Things by Betty and David Prince is the best so far. With almost five hundred references and an excellent first chapter that explains the Intelligent IoT using Smart Cities to set the scene, all of the incumbent and new solid-state memory technologies are covered: Flash, EEPROM, FeRAM, RRAM, MRAM, PCM, SONOS, MONOS, CB-RAM. Its all here. From device cross sections all the way to system implementation. I heartily recommend this book to anyone interested in this area, from academics and engineers working in the area to those curious about solid-state memories and what is driving their development. The shaking memory hierarchy has been explained. - Andrew Walker - CEO/Founder of Schiltron Corporation; VP of Spin Memory