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DPS Processor Fundamentals: Architectures and Features
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  • Wiley

More About This Title DPS Processor Fundamentals: Architectures and Features

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This cutting-edge, practical guide brings you an independent, comprehensive introduction to DSP processor technology. A thorough tutorial and overview of DSP architectures, this book incorporates a broad range of today's product offerings in examples that illustrate DSP features and capabilities. This book is especially useful to electronic systems designers, processor architects, engineering managers, and product planners.
  • English

English

Philip D. Lapsley is a founder of Berkeley Design Technology, Inc., where he is responsible for special projects. He has worked at several research groups at the University of California at Berkeley, the NASA Ames Research Center, Teknekron Communications Systems, and the U. C. Berkeley Space Sciences Lab.

Jeffrey C. Bier is a founder of Berkeley Design Technology, Inc., where he is responsible for general and technical management, research, and product development. His experience spans software, hardware, and design tool development for signal processing and control applications in commercial and research environments.

Amit Shoham is a Senior DSP Engineer with Berkeley Design Technology, Inc., where he focuses primarily on benchmarking DSP processor performance and evaluating DSP design tools. Prior to joining BDT, Mr. Shoham was at Silicon Graphics, where he developed diagnostics for digital audio hardware.

Edward A. Lee is a professor in the Electrical Engineering and Computer Science Department at the University of California at Berkeley and a founder of Berkeley Design Technology, Inc. He has been co-director of the Ptolemy project (a system-level design and simulation project) at U. C. Berkeley since its inception in 1990. He is a fellow of the IEEE.

  • English

English

Preface.

Acknowledgments.

Digital Signal Processing and DSP Systems.

DSP Processors, Embodiments, and Alternatives.

Numeric Representations and Arithmetic.

Data Path.

Memory Architecture.

Addressing.

Instruction Set.

Execution Control.

Pipelining.

Peripherals.

On-Chip Debugging Facilities.

Power Consumption and Management.

Clocking.

Price and Packaging.

Fabrication Details.

Development Tools.

Applications Support.

Conclusions.

Appendix: Vendor Contact Information.

References and Bibliography.

Glossary.

Index.

About the Authors.
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